Gửi tin nhắn: A comparison of Fault Trees and the Dynamic Flowgraph Methodology
for the analysis of FPGA-based safety systems Part 1: Reactor trip logic
loop reliability analysis
/Phillip McNelles
a,b,n
, Zhao Chang Zeng
a
, Guna Renganathan
a
, Greg Lamarre
a
,
Yolande Akl
a
, Lixuan Lu
b
